Teach with Past the Magic

Every link on this page opens the LC-3 instrument on an exact moment: a guided activity, a prediction exercise, or a specific clock cycle of a specific program. Paste them into a syllabus, a lab handout, or a slide. Everything runs in the browser — students need no account and no setup.

This page is written for instructors and TAs. Students are welcome to work through everything on it directly.

Guided activities

Follow one instruction pastthemagic.com/lc3?activity=follow-one-instruction

Watch a single instruction travel the datapath — fetch, decode, execute — one clock at a time, with the instrument narrating each step.

Your first program pastthemagic.com/lc3?activity=first-program

Assemble and run a first program, then take control of the machine yourself.

Predict exercises

Each link opens the Control Lab parked one clock before a graded moment. The student predicts the control signals for that clock — which registers load, who drives the bus, where control goes next — and commits before the machine reveals the real word. A wrong commit gets feedback that names the specific misconception, not just a mark.

Operate instructions

ADD (register mode) pastthemagic.com/lc3?predict=operate-add

The ALU path: two source registers through the ALU, the result loaded, codes set.

AND (immediate mode) pastthemagic.com/lc3?predict=operate-and-imm

Immediate mode: what the select signals steer when an operand comes from the IR.

Branches and jumps

BR, not taken pastthemagic.com/lc3?predict=branch-not-taken

A BRz whose condition is false: what the microsequencer does with a branch not taken.

Loads and stores

LD (PC-relative) pastthemagic.com/lc3?predict=load-ld

A PC-relative load: address computation, the memory wait, and the writeback clock.

LEA does not set the condition codes pastthemagic.com/lc3?predict=lea-no-cc

The classic trap: an address computed and loaded, and no condition codes touched.

ST (PC-relative) pastthemagic.com/lc3?predict=store-st

A store's memory interface: MAR, MDR, and the write signal the student must place.

Indirect addressing

LDI: the indirection pivot pastthemagic.com/lc3?predict=indirect-ldi

The pivot clock where the first memory read becomes the second read's address.

TRAP

TRAP: saving state before the jump pastthemagic.com/lc3?predict=trap-halt

The clock where the machine saves state — which value drives the bus into the OS.

System entry

An illegal opcode forces a system entry pastthemagic.com/lc3?predict=system-entry-exception

Decode meets an opcode that is not an instruction: the exception entry, live.

Piloting this fall?

If you are using Past the Magic in a course, I would like to hear about it — what you assigned, what landed, what did not. teach@pastthemagic.com